utopia(4)

NAME

utopia - driver module for ATM PHY chips

SYNOPSIS

device utopia

DESCRIPTION

This module is used by all ATM drivers for cards that use
PMC-Sierra
S/Uni and IDT77105/IDT77155 chips to provide uniform func
tionality. The
module implements status monitoring in either interrupt or
polling mode,
media option handling and application access to chip regis
ters.
The driver implements several sysctls that are accessible
under the
hw.atm.<iface>. tree, where iface is the name of the ATM in
terface:
phy_regs
When reading this sysctl an array of 8-bit unsigned
integers is
returned containing all accessible chip registers
starting at
register 0. A register can be written by writing
three 8-bit
unsigned integers to the sysctl: the register num
ber, the new
value and a bit mask. This changes all bits in the
register for
which the corresponding bit in the mask is one to
the bit values
from value. Note that not all registers may be
writeable.
phy_loopback
allows to put the interface in one of several loop
back modes.
Not all modes and all combinations of modes are sup
ported on all
chips. The possible modes are:
UTP_LOOP_NONE (0x00)
No loopback, normal operation.
UTP_LOOP_TIME (0x01)
Timing source loopback. When this is set
the transmitter's clock is derived from the receiver's
clock.
UTP_LOOP_DIAG (0x02)
Diagnostic loopback. In this mode the re
ceiver's input
is connected to the transmitter's output.
The receiver
gets back everything that is sent. The
transmitter operates normally.
UTP_LOOP_LINE (0x04)
Serial line loopback. This connects the
line receiver to
the line transmitter. The chip transmits
all cells back
that it receives. The receiver operates
normally.
UTP_LOOP_PARAL (0x08)
Parallel diagnostic loopback. This feeds
back all transmitted cells into the receiver between the
parallel/serial converters. The transmitter op
erates normally.
UTP_LOOP_TWIST (0x10)
Twisted pair diagnostic loopback. Connects
the high
speed receive data to the high speed trans
mit data. All
received data is sent back. The receiver
operates normally.
UTP_LOOP_PATH (0x20)
Diagnostic path loopback. This connects the
receiver
input to the transmitter output just between
the path
overhead processor and the byte mux. The
transmitter
operates normally.
phy_type
This is the detected type of the phy chip. Current
ly the following chips are supported:
UTP_TYPE_UNKNOWN (0)
The module could not determine the type of
the PHY chip.
UTP_TYPE_SUNI_LITE (1)
PMC-5346 (S/Uni-Lite)
UTP_TYPE_SUNI_ULTRA (2)
PMC-5350 (S/Uni-Ultra)
UTP_TYPE_SUNI_622 (3)
PMC-5355 (S/Uni-622)
UTP_TYPE_IDT77105 (4)
IDT77105 (25.6MBit UTP interface)
UTP_TYPE_IDT77155 (5)
IDT77155 (155MBit interface)
phy_name
This is a string describing the type of the PHY
chip.
phy_stats
Physical and some ATM layer statistics. These are
the statistics
usually provided by the chip. The data is a re
turned in the following structure:
struct utopia_stats1 {
uint32_t version; /* version of this
struct */
uint32_t fill;
uint64_t rx_sbip; /* rx section BIP
errors */
uint64_t rx_lbip; /* rx line BIP er
rors */
uint64_t rx_lfebe; /* rx line far end
block errors */
uint64_t rx_pbip; /* rx path BIP er
rors */
uint64_t rx_pfebe; /* rx path far end
block errors */
uint64_t rx_cells; /* received cells */
uint64_t rx_corr; /* correctable cell
errors */
uint64_t rx_uncorr; /* uncorrectable
cell errors */
uint64_t rx_symerr; /* symbol errors */
uint64_t tx_cells; /* transmitted cells
*/
};
The current version is 1. The statistics are updat
ed from the
chip once a second. On overflow the counters wrap
to zero. Note
that not all counters are meaningful for all PHY
chips. The
statistics are cleared by writing an arbitrary new
value (the
value is ignored).
The utopia module also interfaces with the ifmedia system.
The module
reports the current state of the carrier and will issue a
warning message
when the carrier state changes. While the physical media
itself cannot
be changed, several media options can:
SDH If the PHY is a Sonet/SDH chip this flag switches
the interface
into SDH mode. If this option is not set (the de
fault) the
interface is in Sonet mode.
noscramb
If the PHY is a Sonet/SDH chip disable scrambling.
This may be
useful for debugging purposes.
unassigned
Normally the interface emits idle cells when there
are no other
cells to transmit. This changes the default cell
type to unassigned cells. This may be needed for interworking
with public
networks.

SEE ALSO

en(4), fatm(4), hatm(4), patm(4), utopia(9)

AUTHORS

Harti Brandt <harti@FreeBSD.org>
BSD May 8, 2003
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